1. Field of the Invention
The present invention provides a unique configuration for facilitating the construction of compact three phase line reactors or inductors in order to provide high short circuit capability within relatively compact spaces. This design in this manner provides a compact design for high short circuit requirements of approximately 15-25× rated current and can be used in many difference applications.
2. Description of the Prior Art
Examples of various types of stacked reactors with unique core structures are shown in many current and expired United States patents such as shown in U.S. Pat. No. 2,965,865 patented Dec. 20, 1960 to A. Zack and assigned to Sylvania Electric Products, Inc. of Wilmington, Del. on an “Electrical Conductor”; and U.S. Pat. No. 3,096,568 patented Jul. 9, 1963 to O. H. Biggs et al and assigned to Sylvania Electric Products Inc. on “Manufacture Of Laminated Core Inductors”; and U.S. Pat. No. 3,428,930 patented Feb. 18, 1969 to A. H. TH. J. Sliepenbeek and assigned to Smit Nijmegen Electrotechnische Fabrieken N. V., of Nijmegen, Netherlands on “Laminated Magnetic Core Structures For Transformers Or Choke Coils Of Great Power”; and U.S. Pat. No. 3,636,488 patented Jan. 18, 1972 to Ernst Wiesner and assigned to Dr. Walter Zumtobel of Dombim, Austria on a “Transformer Or Inductor Assembly”; and U.S. Pat. No. 4,238,879 patented Dec. 16, 1980 to C. P. Zurlinden, III et al on a “Laminated Inductor Stacking And Calibrating Apparatus”; and U.S. Pat. No. 5,367,912 patented Nov. 29, 1994 to Takashi Demachi and assigned to Toa Medical Electronics Co., Ltd., of Kobe, Japan on an “Apparatus For Analyzing Liquid Specimen”; and U.S. Pat. No. 5,530,415 patented Jun. 25, 1996 to Minoru Takaya et al and assigned to TDK Corporation of Tokyo, Japan on “Composite Winding Type Stacked-Layer Inductors Including Self Inductive Inductors And Manual-Inductive Inductors”; and U.S. Pat. No. 6,162,311 patented Dec. 19, 2000 to S. Gordon et al and assigned to MMG of North America, Inc. on “Composite Magnetic Ceramic Toroids”; and U.S. Pat. No. 61,198,374 patented Mar. 6, 2001 to D. A. Abel and assigned to Midcom, Inc. on a “Multi-Layer Transformer Apparatus And Method”; and U.S. Pat. No. 6,204,744 patented Mar. 20, 2001 to T. M. Shafer et al and assigned to Vishay Dale Electronics, Inc. on a “High Current, Low Profile Inductor”; and U.S. Pat. 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No. 7,034,091 patented Apr. 25, 2006 to P. G. Schultz et al and assigned to The Regents of the University of California and Symyx Technologies, Inc.; and U.S. Pat. No. 7,069,639 patented Jul. 4, 2006 to M. H. Choi et al and assigned to Ceratech Corporation on a “Method Of Making Chip Type Power Inductor”; and U.S. Pat. No. 7,091,412 patented Aug. 15, 2006 to X. Wang et al and assigned to Nanoset, LLC on a “Magnetically Shielded Assembly”; and U.S. Pat. No. 7,140,092 patented Nov. 28, 2006 to J. W. Park et al and assigned to Georgia Tech Research Corporation on “Methods For Manufacturing Inductor Cores”; and U.S. Pat. No. 7,262,482 patented Aug. 28, 2007 to K. Y. Ahn et al and assigned to Micron Technology, Inc. on an “Open Pattern Inductor”; and U.S. Pat. No. 7,262,680 patented Aug. 28, 2007 to Albert Z. H. Wang and assigned to Illinois Institute of Technology of Chicago, Ill.; and U.S. Pat. No. 7,277,000 patented Oct. 2, 2007 to Masaki Suzui et al and assigned to Canon Kabushiki Kaisha of Tokyo, Japan on an “Inductor and Transformer”; and U.S. Pat. No. 7,294,366 patented Nov. 13, 2007 to M. J. Renn et al and assigned to Optomec Design Company on a “Laser Processing For Heat-Sensitive Mesoscale Deposition”; and U.S. Pat. No. 7,319,599 patented Jan. 15, 2008 to K. Hirano et al and assigned to Matsushita Elecdtric Industrial Co., Ltd. on a “Module Incorporating A Capacitor, Method For Manufacturing The Same, And Capacitor Used Therefor”; and U.S. Pat. No. 7,330,369 patented Feb. 12, 2008 to B. Tran on a “Nano-Electronic Memory Array”; and U.S. Pat. No. 7,375,417 patented May 20, 2008 to B. Tran on “Nano Packing”; and U.S. Pat. No. 7,380,328 patented Jun. 3, 2008 to K. Y. Ahn et al and assigned to Micron Technology, Inc. on a “Method Of Forming An Inductor”; and U.S. Pat. No. 7,390,477 patented Jun. 24, 2008 to R. E. Smalley et al and assigned to William Marsh Rice University on “Fullerene Nanotube Compositions”; and U.S. Pat. No. 7,400,512 patented Jul. 15, 2008 to K. Hirano et al and assigned to Matsushita Electric Industrial Co., Ltd. on a “Module Incorporating A Capacitor, Method For Manufacturing The Same, And Capacitor Used Therefor”; and U.S. Pat. No. 7,419,624 patented Sep. 2, 20078 to R. E. Smalley et al and assigned to William Marsh Rice University on “Methods For Producing Composites Of Fullerene Nanotubes And Compositions Thereof”; and U.S. Pat. No. 7,420,452 patented Sep. 2, 2008 to Sheng-Yuan Lee et al and assigned to VIA Technologies, Inc. of Taipei Hsien (TW) on an “Inductor Structure”; and U.S. Pat. No. 7,481,989 patented Jan. 27, 2009 to R. E. Smalley et al and assigned to William Marsh Rice University on a “Method For Cutting Fullerene Nanotubes”; and U.S. Pat. No. 7,485,366 patented Feb. 3, 2009 to X. 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